Article ID Journal Published Year Pages File Type
7155678 Communications in Nonlinear Science and Numerical Simulation 2015 5 Pages PDF
Abstract
In this paper we propose and demonstrate a discrete circuit capable of generating arbitrary time delays dependent on noise, either added externally or already present in the signal of interest due to a finite signal-to-noise ratio. We then go on to demonstrate an application to phase locking of signals by means of a standard Phase-Locked Loop (PLL) design, where the usual Voltage-Controlled Oscillator (VCO) is replaced by the noise-tunable delay line.
Related Topics
Physical Sciences and Engineering Engineering Mechanical Engineering
Authors
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