Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
721449 | IFAC Proceedings Volumes | 2006 | 6 Pages |
Abstract
The influence of various procedures of Boolean function system minimization on the complexity of regular circuits of programmable logic arrays and irregular circuits that are synthesized in the design library of Gate Array, is investigated experimentally.
Related Topics
Physical Sciences and Engineering
Engineering
Computational Mechanics
Authors
Pyotr Bibilo, Pavel Liavonchyk,