Characterizations of polycrystalline silicon nanowire thin-film transistors enhanced by metal-induced lateral crystallization

In this paper, we present a comprehensive study on the effects of layout design and re-crystallization temperature on the material and electrical characteristics of polycrystalline silicon thin-film transistors (poly-Si TFTs) with metal-induced lateral crystallized (MILC) nanowire (NW) channels. It is found that the off-state leakage current shows strong dependence on the arrangement of MILC seeding windows, while the number of smaller solid-phase-crystallized (SPC) grains in the channel is reduced by lowering the re-crystallization temperature, thus improving the on-state behavior. Moreover, owing to the spatial confinement for MILC fronts, small cross-section of the NW channel would result in little lateral crystallization, and thus retarding the enhancement in performance of MILC NW devices.

► The effect of layout design on MILC poly-Si nanowire TFTs is studied. ► The leakage current shows strong dependence on arrangement of MILC seeding windows. ► The on-state characteristics can be enhanced by using a lower MILC temperature. ► Length and cross-section of a nanowire impact on the MILC behaviors within it.