Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
748474 | Solid-State Electronics | 2013 | 5 Pages |
The charge-trapping (CT) properties of BaTiO3 are investigated by using an Al/Al2O3/BaTiO3/SiO2/Si structure. The memory device with BaTiO3 as CT layer shows promising performance in terms of large memory window (8.6 V by ±12 V for 1 s), high program speed with low gate voltage (a VFB shift of 2.9 V at +6 V, 100 μs), negligible VFB shift after 105-cycle program/erase stressing, and good data retention property (charge loss of 7.9% after 104-s 125 °C baking time), mainly due to the high charge-trapping efficiency of the BaTiO3 film, as well as the large barrier height between the BaTiO3 charge-trapping layer and the SiO2 tunneling layer.
► An abrupt interface with negligible interlayer at BaTiO3/SiO2 is proved by TEM and XPS. ► High P/E speeds and good data retention can be obtained at the same time. ► Charge-loss mechanism is confirmed by activation energy extracted from retention property.