Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
750230 | Solid-State Electronics | 2016 | 4 Pages |
Abstract
In this letter, we report a novel approach to quantitative determination of charge trapping near the channel/drain edge caused by electrical stress. The approach is based on gate-controlled-diode (GCD) measurement. By measuring the GCD drain current in the band-to-band tunneling regime and using the formula developed in this work, the change of the Si surface field resulting from the charge trapping can be calculated instantly, and then the charge trapping is determined quantitatively. It is found that the stress-time dependence of both the surface field change and the charge trapping follow a power law.
Related Topics
Physical Sciences and Engineering
Engineering
Electrical and Electronic Engineering
Authors
T.P Chen, Jiayi Huang, M.S Tse, X Zeng,