A dual channel three-terminal np-LDMOS with both majorities for conduction

A novel dual channel three-terminal np-LDMOS power device with both electrons and holes for conduction is proposed in this paper. Based on a new approach of inducing a large-signal which is processed by a simple circuit for controlling the gate of p-LDMOS inside the device, the new np-LDMOS only requires one external gate controlling voltage signal that can be performed as an n-LDMOS device. The SOA of the new device is improved in comparison with the n-LDMOS device, since the counteracting of electric flux density produced by the both type of carriers' currents. Furthermore, the specific on-resistance of the np-LDMOS device is reduced by about 19% when comparing with that of the conventional one. The control method and performances of the proposed power device are investigated and authenticated by numerical simulations.