Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
8168743 | Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment | 2016 | 9 Pages |
Abstract
A test chip, manufactured in a 180Â nm CMOS image sensor process, implements small prototype pixel matrices in different flavors to compare the standard SF to the novel SF and to the novel SF with additional shielding. The effective sensing node capacitance was measured using a 55Fe source. Increasing reverse substrate bias from â1Â V to â6Â V reduces Ceff by 38% and the equivalent noise charge (ENC) by 22% for the standard SF. The SDF provides a further 9% improvement for Ceff and 25% for ENC. The SDF circuit with additional shielding provides 18% improvement for Ceff, and combined with â6Â V reverse bias yields almost a factor 2.
Keywords
Related Topics
Physical Sciences and Engineering
Physics and Astronomy
Instrumentation
Authors
C. Gao, G. Aglieri, H. Hillemanns, G. Huang, A. Junique, M. Keil, D. Kim, M. Kofarago, T. Kugathasan, M. Mager, C.A. Marin Tobon, P. Martinengo, H. Mugnier, L. Musa, S. Lee, F. Reidt, P. Riedler, J. Rousset, P. Yang,