Sidewall defects of AlGaN/GaN HEMTs evaluated by low frequency noise analysis

The traditional dry etching isolation process in AlGaN/GaN HEMTs causes the gate metal to contact the mesa sidewalls region, forming a parasitic gate leakage path. In this paper, we suppress the gate leakage current from the mesa-sidewall to increase the gate-to-drain breakdown voltage and thereby reduce the interface trap density by using the ion implantation (I/I) isolation technology. According to the capacitance-voltage (C-V) measured curve, the hysteresis voltage was 9.3 mV and the interface state density was 5.26 × 1012 cm−2 for the I/I isolation sample. The 1/f noise phenomena and Schottky characteristics are particularly studied to indicate device linearity, which is sensitive to the semiconductor surface. The fluctuation that causes trapping/detrapping of free carriers near the gate interface can be reduced because side-wall plasma-induced damages were eliminated. The reduced DC and flicker noise variation of I/I isolation HEMTs is beneficial for high power transistor applications.