Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
10364962 | Microelectronics Reliability | 2005 | 6 Pages |
Abstract
As gate voltages scale in ultra-thin gate oxide CMOS and single carrier energy drops below the threshold required for defect generation, we postulate that multiple carrier induced defect generation becomes the dominant degradation mechanism resulting in a power-law voltage and local current acceleration of time-dependent dielectric breakdown (TDDB). Data from multiple technology nodes is presented to corroborate our hypothesis, which is also demonstrated to be consistent with literature reports from several different companies. To the best of our knowledge, this is the first time the power-law local gate current acceleration is proposed in contrast to earlier formulations based on total gate current.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
A. Haggag, N. Liu, D. Menke, M. Moosa,