Article ID Journal Published Year Pages File Type
10365168 Microelectronics Journal 2005 19 Pages PDF
Abstract
This paper estimates approximately and sheds light in an insightful way upon the impact of the basic bipolar process parameters upon harmonic distortion for the log-domain lossy integrator case. A step-by-step, symbolic, transistor-level distortion calculation is elaborated. The determination of the harmonic distortion levels present at the integrator's output is based upon the exploitation on the medium complexity Charge-Control-Model (CCM) for the Bipolar Junction Transistor (BJT). Results correlating the input signal strength with the impact of basic BJT non-idealities (e.g. finite beta values, parasitic base and emitter resistances) upon the output linearity levels are provided.
Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
Authors
,