Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
10365314 | Microelectronics Journal | 2013 | 7 Pages |
Abstract
This research work presents a novel circuit for simultaneous reduction of power, crosstalk and area using bus encoding technique in RC modeled VLSI interconnect. Bus-invert method is used to reduce inter-wire coupling, which is actually responsible for crosstalk, delay and power dissipation in coupled interconnects. The proposed method focuses on simplified and improved encoder circuit for 4, 8 and 16 coupled lines. In past, the researchers developed encoders that usually focused on minimizing power dissipation and/or crosstalk, thereby paying heavy penalty in terms of chip area. However, the proposed encoder and decoder while significantly reducing crosstalk demonstrates an overall reduction of power dissipation by 68.76% through drastically limiting switching activity. Furthermore, while reducing the complexity, chip area and transistor count of the circuit is reduced by more than 57%.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Brajesh Kumar Kaushik, Deepika Agarwal, Nagendra G. Babu,