Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
10365329 | Microelectronics Reliability | 2005 | 9 Pages |
Abstract
ICs that are robust to ESD at the component-level may be damaged by ESD at the board-level. Two case studies show that real-world Charged Board Model (CBM) ESD damage is typically more severe than Human Body Model (HBM) or Charged Device Model (CDM) ESD damage. Consequently, CBM damage can be easily mistaken for electrical overstress (EOS) damage. A high-capacitance yet compact Printed Circuit Board (PCB) evaluation board facilitates qualitative CBM testing using conventional CDM test systems. Based on the case studies and test results, guidelines are provided on how to minimize the likelihood of real-world CBM failures.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Andrew Olney, Brad Gifford, John Guravage, Alan Righter,