Perspectives and challenges in nanoscale device modeling

In this paper, we discuss the role of adequate modelling tools in the development of nanoelectronic technology and devices, including both down-the-roadmap Complementary Metal-Oxide-Semiconductor (CMOS) technology and alternative nanodevices. Such tools can enable understanding of the relevant physical mechanisms on the one hand, and performance evaluation and optimization of device structures, on the other hand. Relevant examples are discussed, drawn by our recent activity, including ballistic strained-silicon Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFETs), stress-induced leakage currents, nanocrystal memories, and silicon nanowire transistors.