Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
11016432 | Microelectronics Reliability | 2018 | 5 Pages |
Abstract
In this study we examine the feasibility of performing transistor reliability measurements with the Hyperion II nanoprobing system. Proof-of-concept bias temperature instability (BTI) measurements were run on a commercially available Intel 14â¯nm FinFET processor. BTI degradation was found to closely follow the expected power law over 103â¯s stress in total at 2â¯V with characterization done <50â¯ms into recovery. Examination of 50 SRAM transistors with 30â¯s stress at 2â¯V yielded average ION reduction of 14.4% (Ïâ¯=â¯6.6%) and 6.5% (Ïâ¯=â¯2.5%) for pullups and pulldowns, respectively. The in-situ nature of the nanoprobing approach provides insight into transistor lifetime and performance as a function of layout as well as variations in aging between identically designed devices. This is a compelling reason to apply nanoprobing for a range of reliability measurements as a complement to the suite of established reliability testing techniques.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
O. Dixon-Luinenburg, J. Fine,