Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
408704 | Neurocomputing | 2006 | 4 Pages |
Abstract
An important metric for simulation algorithms used in compartment modelling is computation efficiency. One algorithmic achievement in efficiency is the Hines method, which substantially reduces the computation cost of solving a system of linear equations arising in each time step of implicit time integration. However, the Hines method does not work for circuits containing gap-junction loops. In this paper, we propose an algorithm with which the Hines method extends its applicability to loop-containing circuits with efficiency almost the same as that of the Hines method for loop-free circuits. Furthermore, our algorithm has good parallelism, promising effective utilization of parallel computing power for large-scale simulations.
Related Topics
Physical Sciences and Engineering
Computer Science
Artificial Intelligence
Authors
Yu Zhuang,