Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
460919 | Microprocessors and Microsystems | 2016 | 14 Pages |
Abstract
This paper demonstrates the design of n-bit novel low power reversible binary incrementer in Quantum-Dot Cellular Automata (QCA). The comparison of quantum cost in quantum gate based approach and in QCA based design agreed the cost efficient implementation in QCA. The power dissipation by proposed circuit is estimated, which shows that the circuit dissipates very low heat energy suitable for reversible computing. All the circuits are evaluated in terms of logic gates, circuit density and latency that confirm the faster operating speed at nano scale. The reliability of the circuit under thermal randomness is explored which describes the efficiency of the circuit.
Related Topics
Physical Sciences and Engineering
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Authors
Jadav Chandra Das, Debashis De,