Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
4971223 | Microelectronics Journal | 2017 | 8 Pages |
Abstract
Recent advances of memristive devices allow high endurance, non-volatile storage and low leakage power. Thus, these devices are suitable candidates for in-memory computing. Several recent studies explored the usage of memristive crossbar array for approximate and neuromorphic computing, including approximate matrix-vector multiplication. However, accurate digital circuit realization using device-level simulation, accounting for more realistic ReRAM device behavior, is only studied for adder circuits so far. In this paper, we report the first study of a multiplier scheme with complementary resistive switch-based crossbar arrays. An efficient mapping of Booth multiplication algorithm with different area-timing trade-offs, is discussed. Simulation studies are performed using 4-bit numbers to validate our approach.
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Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Debjyoti Bhattacharjee, Anne Siemon, Eike Linn, Anupam Chattopadhyay,