Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
4971824 | Microelectronics Reliability | 2016 | 7 Pages |
Abstract
Metal gate/high-k stacks are in CMOS manufacturing since the 45Â nm technology node. To meet technology performance and yield targets, gate stack reliability is constantly being challenged. Assessing the associated reliability risk for CMOS products relies on a solid understanding of device to circuit reliability correlations. In this paper we summarize our findings on the correlation between device reliability and circuit degradation and highlight areas for future work to focus on.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
A. Kerber,