Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
541216 | Microelectronics Journal | 2016 | 10 Pages |
A three-dimensional (3-D) integrated circuit combining free-space optical interconnects (FSOI) with CMOS devices has been developed. An overview of the combined optical and CMOS system is described. Experimental data and simulated results are provided. A 3-D integrated test circuit merging the free-space optical network with gallium arsenide based vertical cavity surface emitting lasers (VCSELs) and germanium based photodetectors has been experimentally tested. The prototype 3-D IC test circuit exhibits a 3.3 GHz bandwidth and a 5.1 mW total power consumption per link. The bandwidth is limited due to the use of 5 GHz bandwidth commercial VCSELs and the large inductive impedance of the wirebonds attaching the VCSELs and photodetectors to the I/O pads. The design of transmitter circuits for the 3-D integrated free-space optical interconnect system is discussed, and simulated extrapolated results on operating frequency and bandwidth are provided. The microprocessor operates at 333 MHz and includes a bus width of 64 bits, requiring a FSOI bandwidth of 10.65 Gbps after serialization.