| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 541589 | Microelectronics Journal | 2014 | 8 Pages |
Abstract
Backend dielectric breakdown degrades the reliability of circuits. A methodology to estimate chip lifetime due to backend dielectric breakdown is presented. It incorporates failures due to parallel tracks, the width effect, field enhancement due to line ends, and variation in activity and temperature. Different workloads are considered as well, in order to evaluate aging effects in microprocessors running real-world applications with realistic use conditions.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Chang-Chih Chen, Muhammad Bashir, Linda Milor, Dae Hyun Kim, Sung Kyu Lim,