FPGA and ASIC implementation of robust invisible binary image watermarking algorithm using connectivity preserving criteria

Digital watermarking is the process of hiding information into a digital signal to authenticate the contents of digital data. There are number of watermarking algorithm implemented in software and few in hardware. This paper discusses the implementation of robust invisible binary image watermarking algorithm in Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuits (ASIC) using connectivity preserving criteria. The algorithm is processed in spatial domain. The algorithm is prototyped in (i) XILINX FPGA (ii) 130 nm ASIC. The algorithm is tested in Virtex-E (xcv50e-8-cs144) FPGA and implemented in an ASIC.