Article ID Journal Published Year Pages File Type
541966 Microelectronics Journal 2013 10 Pages PDF
Abstract

Impact of crosstalk effects reduces the integrity of signals transmission on long interconnects which must be taken into consideration from the test point of view. Since use of ATE for at-speed test of crosstalk effects is very expensive, the BIST method is a proper method to perform such a test. In this paper, we propose a strategy in which all links among the switches of a regular 2-D NOC are tested in a fully parallel manner. The MVT patterns are generated by test pattern generators which are embedded in each of the switches and are applied to the links. To simultaneous test all links; the Quasi-synchronous method has been utilized for distributing of the clock across entire the NOC. In the proposed method not only test application time is reduced considerably, but also area overhead in overall NOC is reduced due to reuse of the first word of the output buffers of the switches for embedding the test pattern generators.

Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
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