Article ID Journal Published Year Pages File Type
542029 Microelectronics Journal 2010 8 Pages PDF
Abstract

Current sample-and-hold (SHI) stage is important for reducing the signal distortion of bio-medical current detectors. Previous SHIs achieve high linearity only with high power consumption. This paper introduces a low-distortion switched-current (SI) sample-and-hold stage for high-performance current sampling of weak currents, by applying constant charge injection on a weakly inverted MOS transistor. The paper also introduces a methodology to design and optimize the SHI for a target signal-to-noise-distortion ratio (SNDR). A sample SHI is designed according to the methodology in a 0.35μm CMOS process. Silicon measurements verify that the fabricated SHI meets the design targets, and can achieve above 58 dB SNDR and above 68 dB spurious-free dynamic range (SFDR) at the sampling rate of 2 kS/s for a 100 nA input current up to 1 kHz. The power consumption of the SHI is only 0.7μW.

Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
Authors
, ,