The evaluation of mechanical stresses developed in underlying silicon substrates due to electroless nickel under bump metallization using synchrotron X-ray topography

The switch-over to the use of flip-chip Si integrated circuit bonding techniques has been driven by a need to develop higher power and lower voltage devices, capable of carrying larger currents with greater reliability. With the increased use of solder bump interconnections, an understanding of the behaviour of commonly used electroless nickel under bump metallization (UBM) layers is becoming ever more crucial. The aim of this paper is to evaluate the usefulness of white beam synchrotron X-ray topography (WBSXRT) for non-destructive evaluation of the induced mechanical stresses on Si substrates for different Ni(P) based UBM sizes and thicknesses. It is shown that WBSXRT is a powerful tool for non-destructively mapping strain and/or defect distributions within the underlying silicon substrate. Using this technique, it was also found that the crystalline misorientation induced in the underlying silicon is increased for larger UBM diameters. Stress magnitudes in the Si substrate directly under the UBM can reach values as high as 260 MPa.