Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
544173 | Microelectronics Journal | 2006 | 4 Pages |
Abstract
The spacer technique is proposed for the fabrication of the Asymmetric Schottky Barrier MOSFETs (ASB-MOSFET). The characteristics of the 45 nm and the 20 nm n-channel ASB-MOSFETs, which adopt a Schottky barrier height of 0.9 eV at source and that of 0.2 eV at drain, have been simulated and discussed by the comparisons with the conventional Schottky Barrier MOSFETs (SB-MOSFET). With a higher Ion/Ioff ratio, the ASB-MOSFET structure has shown a better performance than the conventional SB-MOSFETs.
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Hardware and Architecture
Authors
L. Sun, D.Y. Li, X.Y. Liu, R.Q. Han,