Exact analytical model of single electron transistor for practical IC design

This paper presents a new exact analytical model for single electron transistor (SET) applicable for circuit simulation. It has been developed based on orthodox theory of single electronics using master equation where a scheme has been suggested to determine the most probable occupied electron states. The proposed model is more flexible and is valid for single or multi-gate, symmetric or asymmetric devices and can also consider the background charge effect. It can be used for large drain–source voltage range whatever the device is biased under symmetric or asymmetric bias conditions. SET characteristics produced by the proposed model have been verified against widely accepted single electron circuits Monte Carlo simulator SIMON and show a good agreement. Moreover, the model has been implemented in a widely used commercial circuit simulator SPICE to enable simulation with conventional electronic elements and a single electron inverter has been simulated and verified with SIMON results.