| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 545463 | Microelectronics Reliability | 2009 | 5 Pages |
Abstract
In this paper, we analyze the impact of various process steps on the reliability of PMOSFET’s submitted to Negative Bias Temperature Instabilities stress conditions. We give some evidence of the complete thermal anneal of interface states induced by NBTI and investigate the influence of the oxide thickness and of the final forming gas anneal. Then we show a NBTI lifetime improvement after a fluorine implant through the gate and an arsenic bulk doping value increase.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Christelle Bénard, Gaëtan Math, Pascal Fornara, Jean-Luc Ogier, Didier Goguenheim,