Article ID Journal Published Year Pages File Type
545480 Microelectronics Reliability 2009 6 Pages PDF
Abstract

In ULSI multilevel metallizations the via bottom is the main region for the appearance of local stress. This local stress can lead to fractures or porous spots. Out of this concerning the local stress distribution the via bottom region has to be investigated. Due to various technological processes the via shape especially the via bottom geometries are different. In this paper FE-Simulations with respect to the different via bottom geometries and different temperatures of the process steps will be presented. The best via bottom geometry is figured out. The submodeling technique in ANSYS® is used for these investigations for reduction of simulation time and precise results. The thickness of the barrier has also an influence on the mechanical stress and will be also investigated.

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Physical Sciences and Engineering Computer Science Hardware and Architecture
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