Article ID Journal Published Year Pages File Type
545490 Microelectronics Reliability 2009 5 Pages PDF
Abstract

A new failure analysis and reliability assessment approach has been developed, based on surface topography analysis of ICs and assemblies under thermal stress conditions. An important application concerns the assessment of the ability of ICs to withstand typical JEDEC type solder cycles without too strong stress accumulation in the components. An important advantage of this new technology is the predictive power, i.e. the delamination risk may be visualized before physical failure occurs.

Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
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