| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 545635 | Microelectronics Reliability | 2009 | 10 Pages |
Abstract
This paper presents new approach for a hardware architecture for a digital protective relay. All functions for the measurements and relay co-ordination can be calculated with a generalized COordinate Rotation DIgital Computer (CORDIC) algorithm instead of by approximation and extrapolation. The resulting protective relay has higher processing capability making it more able to handle parallel multi-channel sources than existing digital/numerical relays are. Co-ordination accuracy can be also improved by the use of the CORDIC algorithm. This architecture was successfully implemented in a 0.35 μm CMOS technology and then verified.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Jong Kang Park, Jong Tae Kim, Myong-Chul Shin,