| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 545838 | Microelectronics Reliability | 2008 | 5 Pages |
Abstract
This work presents some results from electrical (TDDB, TLP, HBM and MM) measurements and ESD calculations/simulations on passive components such as capacitors. In a SIP context, the ESD sensitivity of innovative 3D capacitors is studied. A method to predict the failure threshold of a wide range of capacitor values under ESD events is presented and validated by measurement on silicon. This method consists of using the basic equation of the charge conservation for capacitors in parallel that is adapted to the model of the ESD event.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Frederic Barbier, Sebastien Jacqueline,