Article ID Journal Published Year Pages File Type
545905 Microelectronics Reliability 2008 6 Pages PDF
Abstract

In this paper, an analytical model for threshold voltage of short-channel MOSFETs is presented. For such devices, the depletion regions due to source/drain junctions occupy a large portion of the channel, and hence are very important for accurate modeling. The proposed threshold voltage model is based on a realistic physically-based model for the depletion layer depth along the channel that takes into account its variation due to the source and drain junctions. With this, the unrealistic assumption of a constant depletion layer depth has been removed, resulting in an accurate prediction of the threshold voltage. The proposed model can predict the drain induced barrier lowering (DIBL) effect and hence, the threshold voltage roll-off characteristics quite accurately. The model predictions are verified against the 2-D numerical device simulator, DESSIS of ISE TCAD.

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Physical Sciences and Engineering Computer Science Hardware and Architecture
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