On the electrical properties of slotted metallic planes in CMOS processes for RF and millimeter-wave applications

This paper presents a study of the effects of slotted metallic planes in passive structures built using CMOS processes for RF and millimeter-wave (mmW) applications. The impact of holes on the reference plane resistance and in the capacitance of any surrounding structure to the plane are investigated through electromagnetic (EM) simulations. Two analytical expressions are derived that capture the holes impact on the plane resistivity and on the dielectric constant of the materials found between the plane and the surroundings. These expressions are used to propose a simplified EM simulation methodology for on-chip microstrip transmission lines.