Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
546212 | Microelectronics Reliability | 2006 | 6 Pages |
Abstract
The reliability of dual damascene Cu/low – k interconnects is limited by electromigration – induced void formation at vias. In this paper we investigate via void morphologies and associated failure distributions at the low percentiles typical of industry reliability requirements. We show that Cu/low – k reliability is fundamentally limited by the formation of slit – voids under vias. Using experimental and simulation approaches we clarify the practical importance of apparent incubation phenomena associated with this failure mode.
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