Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
546682 | Microelectronics Journal | 2006 | 8 Pages |
Abstract
A CMOS voltage reference generator, based on the difference between the gate–source voltages of two NMOS transistors, has been implemented with AMS 0.35 μm CMOS technology (Vthn=0.45Vthn=0.45 and Vthp=0.75V at 0 °C). The minimum and maximum supply voltages that ensure the correct operation of the reference voltage generator, are 1.5 and 4.3 V, respectively. The supply current at the maximum supply voltage and at 80 °C is 2.4 μA. A temperature coefficient of 25 ppm/°C and a line sensitivity of 1.6 mV/V are achieved. The power supply rejection ratios without any filtering capacitor at 100 Hz and 10 MHz are larger than −74 and −59 dB, respectively. The occupied chip area is 0.08 mm2.
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Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Giuseppe De Vita, Giuseppe Iannaccone,