| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 546684 | Microelectronics Journal | 2006 | 6 Pages |
Abstract
A high-performance CMOS unity-gain current amplifier is proposed. The solution adopts two feedback loops to reduce the input resistance and a nested-Miller technique to provide frequency compensation. A design example using a 0.8 μm process and a 2 V supply is given and SPICE simulations show a bandwidth of 75 MHz, no slew-rate limitations and a settling time better than 50 ns, irrespective of the current amplitude. Input and output resistances are better than 0.1 Ω and 15 MΩ, respectively. The input-referred white noise spectral density is 10pA/Hz.
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Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Giuseppe Di Cataldo, Rosario Mita, Salvatore Pennisi,