Methodology for predicting off-state reliability in GaN power transistors

•Lifetest performed on high power GaN FET test structures in the off-state across temperature and voltage.•Results used to predict FIT rate of product level FETs using linear scaling of the gate width.•The effects of a burn-in and transient voltage under a duty cycle are also modeled.•The effects of linear scaling, a burn-in and a transient voltage all serve to increase the FIT rate.

Results of a lifetest across temperature and drain voltage on off-state high power GaN FET test structures are presented. The times to failure (tf) are fitted to a combination of the Arrhenius model (ln(tf) ∼ inverse temperature) and the linear field model (ln(tf) ∼ drain voltage). The estimated activation energy (Ea) is 2.1 eV and the estimated linear field parameter (γ) is 0.03 V−1. Reliability parameters estimated from the test structure data are used to predict the FIT rate for a product level FET using linear scaling of the gate width. Further, the effect of a burn-in and a transient voltage under a duty cycle on the FIT rate are modeled. The FIT rate of the product level FET is larger than that of the test structure. The burn-in and transient voltage similarly reduce the reliability. Contour plots are given that allow trade-offs between these factors in order to meet reliability requirements.