Article ID Journal Published Year Pages File Type
546961 Microelectronics Journal 2015 6 Pages PDF
Abstract

•Crosstalk noise model is presented for CMOS-gate driven MWCNT interconnects using FDTD.•CMOS driver is modeled by modified alpha power law model.•The proposed model is validated with industry standard HSPICE simulations.•The average error while estimating the noise peak voltage is less than 2%.•The proposed model can be incorporated in CAD simulation tools.

This paper presents a crosstalk noise model of CMOS gate-driven coupled multi-walled carbon nanotube (MWCNT) interconnects based on finite-difference time-domain (FDTD) technique. The analysis is based on the transmission line model of MWCNT interconnect and modified alpha power law model of CMOS driver. It is observed that the results of proposed model closely match with that of HSPICE simulations and at the same time the model is more time efficient than the HSPICE. Moreover, it is observed that the conventional models are not useful for accurate estimation of crosstalk induced performance parameters.

Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
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