Article ID Journal Published Year Pages File Type
547153 Microelectronics Journal 2014 7 Pages PDF
Abstract

This paper presents the design of a VCO-based phase-expanding converter (PEC) that converts a time residue to improve time resolution for the time-domain data converters. A voltage controlled oscillator, which has multiphase structure, is combined with the multi-layer delay chain to generate quadruple phases, and thus expands the overall resolution. Since the architecture of this converter is flexible for different designs, we propose a 6-bit, 250 MHz PEC using a 16-phase, 1 GHz VCO with quadruple phase expander in this paper. Simulations in a 0.18 μm the CMOS process indicate that the PEC has DNL less than ±0.2 LSB LSB, and INL less than ±0.3 LSB. Furthermore, with the frequency variation from 0.9 GHz to 1.1 GHz, the PEC still has DNL ±0.21 LSB, and INL ±0.29 LSB. Experiment results show that the DNL is 0.52–0.13 LSB and the INL is 0.21–0.66 LSB.

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Physical Sciences and Engineering Computer Science Hardware and Architecture
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