Article ID Journal Published Year Pages File Type
547157 Microelectronics Journal 2014 6 Pages PDF
Abstract

Design and characterization of a 13 bit serial-to-parallel converter in GaAs technology for smart antennas are presented. The circuit has been realized with NOR-based super-buffered enhancement/depletion logic, and optimized for a compact layout. The serial-to-parallel converter operates properly well above the 20 kHz design clock frequency.

Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
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