Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
547184 | Microelectronics Reliability | 2012 | 6 Pages |
A novel interface charge islands partial-SOI (ICI PSOI) high voltage device with a silicon window under the source and its mechanism are studied in this paper. ICI PSOI is characterized by a series of equidistant high concentration n+-regions on the bottom interface of top silicon layer. On the condition of high-voltage blocking state, inversion holes located in the spacing of two n+-regions effectively enhance the electric field of the buried oxide layer (EI) and reduce the electric field of the silicon layer (ES), resulting in a high breakdown voltage (VB). It is shown by the simulations that the enhanced field ΔEI and reduced field ΔES by the accumulated holes reach to 449 V/μm and 24 V/μm, respectively, which makes VB of ICI PSOI increase to 663 V from 266 V of the conventional PSOI on 5 μm silicon layer and 1 μm buried oxide layer with the same silicon window length. On-resistance of ICI PSOI is lower than that of the conventional PSOI. Moreover, self-heating-effect is alleviated by the silicon window in comparison with the conventional SOI at the same power of 1 mW/μm.