Article ID Journal Published Year Pages File Type
547459 Microelectronics Journal 2013 5 Pages PDF
Abstract

A highly linear Gilbert cell squarer is designed using a modified derivative superposition (MDS) technique, which employs a pair of NMOS–PMOS auxiliary transistors in weak inversion and an auxiliary PMOS transistor in moderate inversion. This technique reduces the inherent sensitivity of derivative superposition linearization schemes to bias voltage level. The Volterra series analysis of the squarer is reported to examine the effectiveness of the new technique. Simulation result using TSMC 0.13 μm CMOS technology, demonstrates that MDS gives rise to 15 dB improvement in IIP2 and 5 dB improvement in IIP3 of squarer. Moreover, Bias voltage of squarer can be tolerated within 0.45–0.6 V with acceptable IIP2 and IIP3 performances. The new linearization technique is applicable to RF modules in many wireless communications.

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