Article ID Journal Published Year Pages File Type
547466 Microelectronics Journal 2013 6 Pages PDF
Abstract

A single capacitor with current amplifier compensation (SCCAC) for ultra–large capacitive load low-power three-stage amplifier is presented in this paper with detailed theoretical analysis. With the unique compensation capacitor and current amplifier, the non-dominant poles determined by the ultra-large capacitive load are pushed to much higher frequencies, which results in improved capability of driving capacitive load. Furthermore, the physic size of the compensation capacitor is significantly reduced to save the overall chip area. The proposed SCCAC amplifier has been implemented in a 0.13 μm CMOS process and the chip area is only 0.08×0.06 mm2, which is smaller than most of the three-stage amplifier. Test results show that the SCCAC amplifier can drive capacitive load up to 20 nF with a compensation capacitor of only 1.16 pF.

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Physical Sciences and Engineering Computer Science Hardware and Architecture
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