| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 547684 | Microelectronics Reliability | 2007 | 4 Pages |
Abstract
An analytical model on the threshold voltage of SiGe-channel pMOSFET with high-κ gate dielectric is developed by solving the Poisson’s equation. Energy-band offset induced by SiGe strained layer, short-channel effect and drain-induced barrier lowering effect are taken into account in the model. To evaluate the validity of the model, simulated results are compared with experimental data, and good agreements are obtained. This model can be used for the design of SiGe-channel pMOSFET, thus determining its optimal parameters.
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Authors
X. Zou, J.P. Xu, C.X. Li, P.T. Lai, W.B. Chen,