Article ID Journal Published Year Pages File Type
547874 Microelectronics Journal 2009 8 Pages PDF
Abstract

In this paper an integrated circuit for the measurement of the real and imaginary part of an impedance is presented. The circuit is intended for its use in a wireless integrated system. A mixed analog/digital approach has been adopted in order to minimize power and area requirements, as requested by the application. The four electrode configuration is used for impedance measurement using two excitation current sources and a buffer instead of an instrumentation amplifier, therefore reducing the circuit complexity. The digital block controls the working frequency and can compensate the phase error introduced by the analog filters, thereby reducing the total error in the measurement. The integrated circuit has been designed in a 0.35μm CMOS process and it works with 3.3 V with a power consumption of 528μW. Experimental results to verify its functionality are presented.

Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
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