| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 548029 | Microelectronics Journal | 2007 | 8 Pages |
Abstract
A 0.5μm CMOS radio frequency class-D amplifier is analysed and simulated with a bandpass ΣΔΣΔ modulated drive signal. The design includes a five stage driver and operates from 3.3 V. The simulated power efficiency at 181 MHz is 40.1% for a two tone source, and 16.6% for a 8.7 dB peak-to-average wideband code-division multiple access source signal. Equations are derived which demonstrate the relationship between amplifier load power, power efficiency, and modulator parameters called coding efficiency and average transition frequency.
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Hardware and Architecture
Authors
Thomas Johnson, Robert Sobot, Shawn Stapleton,