Article ID Journal Published Year Pages File Type
548239 Microelectronics Reliability 2012 8 Pages PDF
Abstract

ESD design of RFIC is a great issue due to the lack of ESD device models and the interactions between ESD protection and core circuits of RFIC. In this paper, a novel co-design methodology incorporating device-level simulation of ESD device and RF circuit design is proposed. In this methodology, the ESD protection is incorporated into RFIC core circuit design by extracting S parameters and constructing table-lookup model of the ESD matching network. By comparing the RF performances with expected targets, the parameters of matching components and ESD device structures are rectified. In addition, the critical parameters of ESD protection are obtained by simulation. The RF-ESD design of a 5.25 GHz LNA is used to demonstrate the implementation of this novel approach.

Related Topics
Physical Sciences and Engineering Computer Science Hardware and Architecture
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