| Article ID | Journal | Published Year | Pages | File Type |
|---|---|---|---|---|
| 548453 | Microelectronics Reliability | 2007 | 5 Pages |
Abstract
HBM ESD sensitivity testing of high pin count devices is a challenge for current testers and the standardized test procedure. Alternative HBM test procedures are described for the test of devices with fewer tester channels than device pins. Experimental results for the “Split-IO” test method are presented and the risks of divergent results are discussed.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Tilo Brodbeck, Reinhold Gaertner,