Article ID | Journal | Published Year | Pages | File Type |
---|---|---|---|---|
548561 | Microelectronics Reliability | 2006 | 12 Pages |
Abstract
There is a trend to revive mature technologies while including high voltage options. ESD protection in those technologies is challenging due to narrow ESD design windows, NMOS degradation problems and the creation of unexpectedly weak parasitic devices. Different case studies are presented for ESD protection based on latch-up immune SCR devices.
Related Topics
Physical Sciences and Engineering
Computer Science
Hardware and Architecture
Authors
Bart Keppens, Markus P.J. Mergens, Cong Son Trinh, Christian C. Russ, Benjamin Van Camp, Koen G. Verhaege,