Article ID Journal Published Year Pages File Type
548587 Microelectronics Reliability 2006 9 Pages PDF
Abstract

This paper presents new insights into board level drop impact using analytical relations that have been developed. The dominance of bending moment as a failure driver leads naturally to the dynamic–static analysis technique, which together with the dominance of fundamental flexing mode led to a simple relation for interconnection stress. Using this relation, it has been found that miniaturisation of interconnection with accompanying reduction in load bearing area is the most significant source of drop impact vulnerability. Finally, a low cost PCB has been proposed with equivalent dynamic characteristic and near equivalent interconnection stress as the eight-layer microvia board specified in JEDEC Std JESD22-B111.

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Physical Sciences and Engineering Computer Science Hardware and Architecture
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